Overview In this role you will drive thermal modeling and simulation of packaging hardware for silicon test chips in a multidisciplinary quantum computing team. You will enable co-design with stakeholders and work with mechanical designers to optimize heat spreaders, communicating milestones and results to diverse audiences. The position supports Intel's silicon quantum dot advancements and scalable quantum systems development in a fast-paced research environment. You will stay current with packaging tech trends and contribute to shaping cutting-edge quantum packaging solutions.
Compensation / Benefits- Stock bonuses
- Health benefits
- Retirement plan
- Vacation time
- Competitive compensation
- On-site role
Responsibilities- Thermal modeling and simulation of packaging hardware to analyze heat flow
- Manage overall integration of packaging hardware and enable co-design among stakeholders
- Collaborate with mechanical designers to define heat spreaders for optimal performance
- Deliver and present design milestones to stakeholders
- Communicate designs through presentations and documentation
- Stay updated on packaging technology by attending conferences and reading papers
Key requirements- MS in Electrical Engineering or Physics (or related field) with 5+ years in thermal modeling and packaging or
- PhD in Electrical Engineering, Physics or related field with relevant experience
- Excellent communication and presentation skills
- Strong analytical thinking and problem-solving
- Collaborative mindset to work across diverse teams
- Thermal/mechanical modeling and simulation
- Experience with Ansys Icepak and COMSOL
- Understanding of packaging technologies and thermal integration
