Overview In this role you will shape power-aware architectures for Tenstorrent's next-gen AI compute systems. You will work closely with the Tensix team to drive power modeling, gating, and leakage control from concept through RTL, influencing design decisions across servers and chiplet-based platforms. You'll stress real-world workloads to guide thermal and power delivery, aligning pre-silicon estimates with silicon measurements. This is a hands-on, impact-driven position in a collaborative, growth-oriented environment.
Compensation / Benefits- highly competitive compensation package
- benefits
Responsibilities- Predict power consumption early in architecture and track through RTL evolution
- Propose architectural changes for power optimization across server and non-server markets
- Build workloads that stress real-world use cases and guide thermal and power-delivery solutions
- Correlate pre-silicon estimates to silicon measurements and drive power efficiency improvements
Key requirements- 15+ years experience with power estimation tools like PowerArtist, PtPX, RTL Architect, and PrimePower
- Skilled in modeling and optimizing power at the architectural level with knowledge of power-gating, voltage domains, and leakage control
- Track record of influencing architectural and micro-architectural changes that reduce design power
- Proficient in Verilog HDL, Design Compiler, C/C++ and Python
- Background in power-optimization of compute datapath and/or interconnects
- collaboration
- curiosity
- problem-solving
- PowerArtist
- PtPX
- RTL Architect
