Senior FPGA/Emulation Validation Engineer

As a Senior FPGA/Emulation Validation Engineer, you will validate and integrate FPGA and emulation solutions within Axiado's security-focused platform. You'll work across Architecture, Verification, ASIC Design and Software teams to enable pre-silicon emulation and prototyping for SOC designs. You'll shape validation strategies, debugging practices, and toolchains to ensure robust hardware-backed security in datacenters and cloud AI platforms. This is an opportunity to impact secure, scalable infrastructure at the hardware-software boundary.

• Set up FPGA/Emulation platform and device modeling
• Set up FPGA/Emulation debugging tools
• Customize the SOC design for the FPGA/Emulation platform
• Modeling, debugging, creating and running validation tests; support SW debugging
• Collaborate with SOC design, verification, systems and software teams to achieve pre-silicon emulation and prototyping goals

• Strong experience with FPGA and Emulation platforms
• Familiarity with PCIe, USB, Ethernet, SPI and other common SOC/ASIC protocols
• Experience with FPGA tools such as Vivado
• Good knowledge of how FW/SW works on SOC
• BS or MS in EE/EECS/CS or equivalent
• 5+ years of work experience

• Good communication skills
• FPGA and Emulation platforms
• PCIe, USB, Ethernet, SPI
• Vivado
• FW/SW interaction on SOC