Senior Memory Controller Verification Engineer

As a Senior Verification Engineer in NVIDIA's Tegra SoC Memory Subsystem IP team, you drive verification strategy and execution to ensure functional correctness and performance. You partner with design and architecture to shape implementation choices, develop verification plans, and maintain regressions to sign off on IP quality. You will enable cross-team collaboration with FPGA and software teams and contribute to post-silicon verification. This role offers impact across diverse product lines, from consumer graphics to AI and HPC, in a fast-paced, innovative culture.

• equity
• generous benefits
• base salary + eligibility for equity
• hybrid work
• career growth opportunities

• Develop verification infrastructure (testbenches, BFMs, checkers, monitors, randoms)
• Drive test plan execution for planned features
• Define and optimize performance test plans for the IP
• Ensure RTL code and functional coverage
• Collaborate with FPGA and software teams to test software
• Plan and participate in post-silicon verification and debugging

• BS / MS or equivalent experience
• 3+ years of ASIC verification experience
• Exposure to design and verification tools (VCS or equivalent, Debussy, GDB)
• Background with SystemVerilog and UVM-based verification

• Strong debugging and problem solving
• Good interpersonal skills and teamwork
• Attention to detail
• SystemVerilog
• UVM
• VCS (or equivalent simulation tools)