Senior Digital ASIC / FPGA Design Engineer

As a Digital ASIC/FPGA Design Engineer, you drive end-to-end design from RTL to GDS, including verification planning and firmware-based checks. You validate with test vectors and BIST, and you optimize through synthesis and debugging. You model behavior with Verilog/Verilog-AMS and work on high-speed digital designs for ASIC/FPGA projects. This role offers hands-on impact in a fast-paced tech environment, collaborating across teams to deliver robust digital solutions.

• Implement full design flow from RTL to GDS
• Plan and execute verification including firmware-based checks
• Validate with scan vectors and BIST implementations
• Perform logic synthesis, simulation setup, and debugging
• Model behavior using Verilog and Verilog-AMS

• Master of Science in Electrical Engineering with 8+ years (or PhD with 5+ years) in ASIC/FPGA design
• ASIC & FPGA background with hands-on, high-speed digital design
• Proficiency in Verilog and SystemVerilog
• Experience with mixed-mode simulation, STA, and logic synthesis
• Experience with Synopsys and/or Quartus
• Signal processing experience is a plus
• Team-oriented and able to work under pressure

• teamwork
• ability to work under pressure
• Verilog
• SystemVerilog
• mixed-mode simulation
• Static Timing Analysis (STA)