Senior Staff Digital Design Engineer (Wireless SoC)

As a Senior Staff Digital Design Engineer, you will help define and implement high-performance, low-power SoC digital designs for connectivity devices. You'll collaborate with cross-functional teams to translate architecture into silicon, delivering verilog testbenches and stimulus files for bring-up and production. You will shape design methodologies, timing closure, and power-management strategies to meet product needs. This role offers growth in a collaborative, people-focused environment with meaningful client impact and global opportunities.

• Contribute to SoC architecture development for high-performance low-power IoT devices
• Bring designs from concept to silicon using SystemVerilog, Python, Tcl, and UPF
• Collaborate across Systems, RF, software, verification, and operations teams
• Support schedule and resource planning to deliver on-time products
• Help define digital/system design methodologies, test strategies, and flows

• Theoretical and practical knowledge of SoC architectures with embedded processors
• Familiarity with AXI/AHB/APB/OBI bus architectures
• Deep RTL design knowledge (SystemVerilog)
• Experience with multi-clock and multi-power domain systems and power minimization
• Understanding of timing constraints, STA, and timing closure
• Experience with Arm TrustZone, device lifecycle states, Secure Boot, and PSA Certified Level 2+ security
• MS/PhD EE/CS preferred

• Strong communication
• Ability to work with changing requirements
• Collaboration and cross-functional teamwork
• SystemVerilog RTL design
• Python
• Tcl