Overview In this role you lead the definition and analysis of next-gen ML hardware accelerators with a focus on vision workloads for mobile and emerging products. You will collaborate with RTL, verification, synthesis, and physical design teams to optimize performance, power, and area while delivering best-in-class ML solutions. You'll use models, simulators, profilers, and real hardware to justify architectural decisions and work with cross-functional teams to align architecture with product goals. You'll contribute to patentable innovations and pursue impactful hardware solutions that scale across platforms.
Compensation / Benefits- competitive annual discretionary bonus
- RSU grants
- comprehensive benefits package
- opportunity to work on cutting-edge ML hardware
- highly competitive compensation
- accommodations for disabilities on request
Responsibilities- Architect high-performance, power-efficient ML hardware accelerator designs for computer vision workloads
- Analyze and optimize hardware for performance, power, and area tradeoffs
- Define hardware micro-architecture for efficient ML algorithm implementations
- Lead HW IP development in collaboration with RTL, verification, and physical design teams to improve PPA
- Collaborate with global hardware, software, and systems teams to deliver ML solutions
- Coordinate with cross-functional teams to align architecture with product goals
- Use models, simulators, profilers, and real hardware to justify architectural decisions
- Apply knowledge of CPUs, GPUs, DSPs, memory and bandwidth to ML hardware design
- Invent and file patents for innovative hardware solutions
Key requirements- Experience in hardware development for ML, multimedia, or accelerator technologies
- Experience in system or chipset development for SoC products, preferably in mobile
- Familiarity with OS principles and HW/SW interaction
- Experience with SoC bus, interconnect, and memory technologies
- MS Degree with 15+ years in architecture/micro-architecture, ML/multimedia cores, Verilog/SystemVerilog/HLS, C/C++/SystemC, simulators and performance/power models, scripting & automation
- excellent communication and presentation skills
- leadership and people management
- cross-functional collaboration
- Architecture/micro-architecture of ML or multimedia cores
- ML frameworks and accelerator standards (TensorFlow Lite, ONNX)
- VLSI design and verification (Verilog/SystemVerilog/HLS)
