Overview In this role you will define verification strategies for full-chip SoCs and build robust verification infrastructure. You will collaborate with architects, RTL designers, FPGA, and emulation teams to ensure verification requirements are met for next-generation devices. You will drive verification methodology improvements to handle large-scale, embedded processor-driven SoCs. This position offers the chance to impact NVIDIA's AI-enabled computing platforms and stay at the forefront of semiconductor verification.
Compensation / Benefits- equity
- benefits
- base salary aligned to location/experience
- Hybrid work arrangement
- vacation and other standard benefits
Responsibilities- Define verification strategies and full-chip verification plans
- Build and reform verification infrastructure and methodologies for next-gen SoCs
- Collaborate with architects, RTL designers, FPGA and emulation engineers to meet verification requirements
Key requirements- Bachelor's Degree in EE, CS, CE or equivalent
- 5+ years of ASIC DV experience
- Strong analytical and problem-solving abilities
- Experience crafting testbenches and methodologies for large and complex chips
- Deep understanding of verification concepts
- Proficiency in at least one: C++, Object-Oriented Programming, UVM, SystemVerilog
- Familiarity with verification challenges in large-scale builds
- Solid understanding of CPU/SoC architecture concepts
- Experience with verification of SoCs with embedded processors or CPU verification
- Outstanding analytical and problem-solving skills
- strong collaboration and communication abilities
- C++
- Object-Oriented Programming
- UVM
- System Verilog
