Overview Join Broadcom's APD as a DFT Engineer responsible for leading end-to-end DFT programs from spec to production. You will shape DFT architecture for SoCs, define test strategies, generate and verify patterns, and drive yield and post-silicon debug improvements. You work with Physical Design & STA teams and may interact with customers, contributing to 3nm and beyond DFT innovations. This role offers impact on testability, reliability and production readiness within a globally distributed team.
Compensation / Benefits- base salary with discretionary bonus
- equity grants and annual equity awards
- 401(K) with company matching
- ESPP
- Employee Assistance Program (EAP)
- paid holidays, sick leave and vacation time
Responsibilities- Define DFT specifications from customer requirements and DPPM goals
- Implement DFT features (Scan, MBIST, TAP, LBIST, IO, SerDes) and integrate with IPs
- Create and verify test vectors; rapid bring-up at ATE; support RMA
- Collaborate with STA/DI engineers for test closure
- Generate, verify and debug test vectors before tape release; validate on ATE during bring-up
- Assist silicon failure analysis, diagnostics and yield improvement
- Interface with customers, physical design and global test/manufacturing teams
- Work with IP DFT engineers and other stakeholders
- Debug customer return parts on ATE
- Innovate DFT solutions for 3nm and beyond; automate DFT/test vector generation flows
Key requirements- Strong DFT background (IO, Analog DFT, ATPG, Scan, BIST)
- Scan insertion and compression (DFT Compiler, Mentor TestKompress)
- Logic BIST design and debugging
- ATPG vector generation, simulation and debugging (TetraMax, Fastscan)
- Verilog coding, testbench generation and simulation
- Memory BIST insertion/verification on embedded memory
- Boundary scan verification and 1149.1 / 1149.6 knowledge
- Basic Test-STA concepts and constraints
- Familiarity with IEEE1687, IJTAG, ICL and PDL
- Ability to work in cross-functional, multi-disciplined environment
- Solid analog and digital circuit design knowledge; device physics basics
- Understanding of silicon processing, synthesis and transistor reliability
- Strong problem solving, debugging and communication skills
- Experience with data analysis and yield improvement initiatives
- Project management to coordinate deliverables across teams
- strong communication skills
- problem solving and debugging
- cross-functional collaboration
- DFT architectures for ASICs
- Scan, MBIST, TAP, LBIST, IO, SerDes DFT
- DFT tooling: DFT Compiler, Mentor TestKompress, TetraMax, Fastscan
