Overview As Staff Design Engineer, you will design, simulate and optimize DRAM circuits, shaping next-generation memory technologies. You will work with cross functional, global teams to ensure manufacturability, high quality and cost effective solutions, contributing to silicon to system development. You'll leverage AI enabled design tools and lead layout considerations, timing and reliability analyses to drive impactful memory products. This role offers the chance to influence memory architectures and push performance across the product lifecycle. Join Micron to help transform information into intelligence at scale.
Compensation / Benefits- medical, dental and vision plans
- paid time off
- paid holidays
- income protection if unable to work due to illness or injury
- paid family leave
- benefits guide available online
Responsibilities- Design CMOS digital, analog and memory core circuits from concept to solution
- Use AI-enabled tools for schematic editing, data collection and layout floorplanning
- Create optimized floorplans for circuit placement, routing, power delivery, sense margins, array timing and die size
- Simulate circuits using FINESIM, HSPICE and VERILOG; analyze power, performance, reliability and parasitics
- Validate builds through reticle experiments, tape-out revisions and schematic-to-silicon correlation
- Prepare and maintain design docs; contribute to best-known practices and training
- Collaborate with global teams across build, verification, product engineering, test, probe, process integration, assembly and marketing
- Manage layout resources, track tasks, and act as point of contact for design, layout, verification and test issues
- Prepare project status reports and lead design reviews to communicate progress and decisions
Key requirements- Coursework in CMOS Circuit Design, VLSI and Analog Design; understanding of device reliability and floor planning
- Proficiency with Cadence Virtuoso; experience simulating with FINESIM, HSPICE and VERILOG
- Strong analytical and problem-solving skills with proven technical contributions and innovation
- Expertise in DRAM subsystem architecture, specification, operation, or design including cross department leadership
- Ability to collaborate across engineering organizations to optimize manufacturing quality, cost, reliability and time-to-market
- cross-functional collaboration
- clear communication
- problem-solving
- Cadence Virtuoso
- FINESIM
- HSPICE
