Overview As a Clocks team member at NVIDIA, you architect clock domains to meet functional, physical, and test requirements for GPU/CPU chips. You collaborate across design, physical, and silicon teams to optimize clocking performance within PPA constraints and contribute to RTL clocking implementations. You support end-to-end ASIC flow from micro-architecture to silicon bringup and triage silicon or programming issues in lab environments. This role blends hardware design, timing, and collaboration to enable high-speed, reliable clocks for cutting-edge chips.
Compensation / Benefits- equity
- generous benefits package
- competitive salary
- opportunity to work on cutting-edge GPU/AI hardware
Responsibilities- Architect clock domains to satisfy architectural, physical, and test requirements
- Collaborate with multiple teams to meet clocking constraints for GPU/CPU clocks
- Evaluate trade-offs to improve power, performance, and area across DFx, physical implementation, and timing
- Develop and optimize clocking topologies in RTL and support timing closure
- Work with physical design and timing teams to address clocking concerns
- Provide clock RTL information to verification, timing, and DFT teams
- Participate in end-to-end ASIC execution from micro-architecture to silicon bring-up
Key requirements- BS in Electrical Engineering or equivalent experience
- 2+ years of relevant work experience
- Deep understanding of logic optimization and PPA trade-offs
- Excellent interpersonal and cross-team collaboration skills
- Experience in RTL design (Verilog), verification, and logic synthesis
- Strong coding skills in Python or equivalent scripting language
- cross-team collaboration
- effective communication
- problem-solving mindset
- RTL design (Verilog)
- verification
- logic synthesis
