Overview As a CMBU Product Architecture Engineer for DRAM, you will shape Micron's DRAM strategy for AI training and inference by analyzing architectures, identifying bottlenecks, and driving new memory concepts. You collaborate with industry architects, researchers, and ecosystem partners to translate insights into solutions, while mentoring less experienced engineers. The role sits at the intersection of R&D, design, and product teams to move AI memory tech forward. This is a high-impact opportunity to influence next generation DRAM for AI workloads and future compute platforms.
Compensation / Benefits- medical, dental, and vision plans
- paid time-off
- paid holidays
- paid family leave
- benefits guide on
Responsibilities- Explore and analyze system architectures using modeling, simulation, and prototyping tools
- Identify system bottlenecks with customers and partners and propose innovative solutions
- Lead pathfinding efforts for architectures using LPDDR and DRAM module technologies
- Define memory features that increase DRAM value in AI workloads
- Mentor junior system architects and engineers
Key requirements- Bachelor's degree in Electrical Engineering
- 12+ years of engineering experience
- Familiarity with LPDDR and/or DRAM module architectures
- Understanding of memory hierarchy, controllers, PHY, and custom SoC/ASIC design
- Experience with TSV, stacked packaging, or 3D packaging technologies
- collaboration
- mentoring
- problem-solving
- LPDDR architectures
- DRAM module architectures
- memory hierarchy
