Overview In this role you will help define and implement digital SOCs for LEO satellite communications, shaping a groundbreaking wireless solution. You will work with cross-functional teams to translate system needs into chip specifications, RTL, and validated silicon, aiming for high throughput, low latency, and reliable performance. You'll contribute to space-grade requirements and trade-offs that balance cost, power, and spectrum while driving first-time-right silicon. This is a hands-on, impact-focused position in a fast-evolving, mission-driven program.
Compensation / Benefits- health insurance (medical, dental, vision, prescription)
- 401(k) matching
- paid time off
- parential leave
- RSUs
- sign-on payments
Responsibilities- Define and implement silicon-based wireless system architecture from spec to RTL and chip validation
- Develop solutions to optimize throughput, latency, availability within power and cost constraints
- Drive high-quality, first-time-right silicon design and meet stringent power objectives
- Create standalone verification benches and collaborate with verification teams for System-level validation
- Ensure DFT, timing, and power targets are met with close collaboration to the implementation team
- Learn requirements and solutions for systems operating in space
- Perform trade-off analyses to optimize customer experience and resource use (costs, power, spectrum)
Key requirements- Bachelor's degree in Electrical Engineering or related field
- 7+ years of digital design experience, preferably in communication systems
- Experience with products that have gone to volume production
- Experience in low power design techniques
- Strong written and verbal communication
- Ability to write assertions and exposure to formal verification (preferred)
- Team collaboration and cross-functional coordination
- RTL design
- SystemVerilog/Verilog
- DFT and timing closure
