A
Not Specified Permanent

San Jose, California · USA job

Integrated Circuit - Packaging Architect Engineer

AMD

San Jose, California

Job description

Overview

As an Advanced packaging technology leader at AMD, you will shape packaging architectures for client, server, gaming and GPU products. You'll work with product design teams and ecosystem partners to define a packaging roadmap, including DFM/DFY guidelines, and drive technology development from concept to qualification. You'll lead cross-functional teams across geos, tackle yield and reliability challenges, and communicate progress to executives. This role offers the chance to influence how AMD scales packaging for next-generation computing while collaborating across a global partner network.

Responsibilities
  • Define package architectures and roadmaps with product architects during early stages
  • Lead new packaging technology development from concept to qualification
  • Drive test vehicle design and manufacturing to establish design rules and DFM/DFY guidelines
  • Establish yield roadmap and implement data analytics tools as needed
  • Coordinate with manufacturing partners (OSATs, foundries) and suppliers
  • Provide executive-level communication on technology progress and issue resolution
Key requirements
  • Proven track record in semiconductor technology development
  • Experience leading cross-functional engineering teams in architecture definition, process definition or yield improvement
  • Excellent written and verbal communication skills to convey complex signals to stakeholders
  • Leadership experience driving engineering teams across geos
  • Strong background in material science, thin film processes or packaging
  • leadership
  • cross-functional collaboration
  • strong communication
  • package architectures
  • DFM/DFY guidelines
  • yield improvement

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