Overview In this role you will own the end-to-end datacenter compute platform surrounding a high-performance SoC, ensuring peak performance, power efficiency, and reliability in cloud environments. You will define server platform architecture across form factors and multi-node systems, collaborating with silicon, firmware, and OEM/ODM partners to bring platforms from concept to deployment. You will drive platform-level power delivery, thermal management, high-speed I/O, memory topologies, and system management. This position blends architecture, hardware interfaces, and security to enable scalable, data-center-ready solutions. You'll work in MediaTek's Data Center team to shape platforms that power a
Compensation / Benefits- comprehensive health insurance
- life and disability insurance
- savings plan
- Company paid holidays
- Sick Leave
- Vacation time
Responsibilities- Platform Architecture Definition for compute systems (workstation, 1U/2U, multi-node, OCP form factors) surrounding the Datacenter compute SoC
- Architect system-level PDN/VRM and collaborate on air/liquid cooling to meet datacenter TDP constraints
- Define system-level topologies and routing for high-speed interfaces (LP/DDR5/6, PCIe Gen 5/6, CXL); ensure SI/PI targets at board level
- Define architectures for BMC, OpenBMC integration, hardware RoT, and system security (SPDM, TPMs)
- Partner with SoC, BIOS/UEFI, OS, and firmware teams on ACPI, RAS flows, and power management states
- Act as primary technical interface for Tier-1 ODMs, OEMs, and CSPs for platform design, validation, deployment
Key requirements- 10+ years in server system architecture, motherboard design, or datacenter hardware engineering
- Deep understanding of x86, ARM, or RISC-V server/SoC architectures and enterprise hardware
- Expert knowledge of PCIe, CXL, Ethernet, and memory technologies (DDR4/5, LPDDR)
- Strong background guiding SI/PI teams and PCB design limitations
- Solid understanding of server manageability standards (IPMI, Redfish, NC-SI) and BMC architectures
- Experience with Open Compute Project (OCP) specifications and hyperscaler rack architectures
- Understanding of multi-die/chiplet SoC impact on power/thermal
- Excellent communication to document platform specs and present trade-offs to silicon teams and customers
- Ability to collaborate across silicon, firmware, and external customers
- strong collaboration with cross-functional teams
- clear technical communication
- customer-facing engagement with OEMs/ODMs/CSPs
- OpenBMC
- ACPI
- RAS
