G
Not Specified Permanent

San Diego, California · USA job

Senior System Power Architect, Augmented Reality/Virtual Reality Workloads

Google

San Diego, California

Job description

Overview

As Silicon Power and Performance Architect for Pixel AR/VR, you analyze workload-driven power in the Pixel SoC, identify bottlenecks, and propose silicon-level optimizations to meet strict thermal and power constraints. You'll compare architectures with competitors and translate findings into actionable requirements for future Pixel SoCs. You collaborate with software, product, and hardware teams to drive impactful, low-power designs for immersive AR/VR experiences. This role shapes the power and performance strategy that underpins Pixel's market leadership in immersive computing.

Compensation / Benefits
  • bonus target
  • equity
  • benefits
Responsibilities
  • Benchmark and model next-gen AR/VR use cases against competitors to find architectural gaps and opportunities
  • Analyze end-to-end workloads (spatial mapping, hand tracking, passthrough video) to quantify impact on Pixel power consumption
  • Optimize utilization of low-power islands (LPIs) to keep ambient AR/VR tasks efficient
  • Map and optimize critical data paths from display/sensors through the SoC to DDR for maximum bandwidth with minimal power
  • Partner with software, product, and hardware teams to translate architectural insights into silicon requirements for future Pixel SoCs
Key requirements
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a specialized field (e.g., Optics, Sensors, Audio/DSP, etc.), or equivalent practical experience
  • 4 years of experience in SoC architecture, power/performance modeling, or pre-silicon verification
  • Experience with low-power design methodologies or power management techniques (e.g., power gating, DVFS, low-power states)
  • Experience with memory subsystems, interconnects, or data paths to DDR
  • Excellent communication skills to translate complex architectural trade-offs into clear product decisions for leadership
  • SoC architecture
  • power/performance modeling
  • low-power design methodologies (power gating, DVFS)
  • memory subsystems and interconnects to DDR
  • architectural simulators or power estimation tools

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