Overview In this role you drive end-to-end substrate design from concept to tape-out, shaping physical layout and routing for high-performance packages. You collaborate with silicon and hardware teams to optimize system-level performance and pinout. You establish design rules, review processes, and resolve DRCs, delivering thorough documentation inside the product lifecycle system. This position sits at the heart of Intel Foundry's packaging technology, enabling scalable, state-of-the-art silicon-package-board integration for AI-era compute devices.
Compensation / Benefits- competitive pay
- stock bonuses
- health benefits
- retirement plans
- vacation
- employee growth opportunities
Responsibilities- Lead end-to-end substrate design from concept through tape-out and implement layout and routing
- Perform substrate fit and routing studies to evaluate design, performance, and cost tradeoffs
- Collaborate with silicon and hardware teams to optimize silicon-package-board performance and pinout
- Define substrate design rules, conduct reviews, analyze data, and resolve DRCs
- Document and manage collateral in the product lifecycle management system
Key requirements- Ph.D./Master in electrical engineering, chemical engineering, mechanical engineering or materials science (minimum Master)
- 10+ years of experience in package, PCB design, or IC digital design
- Strong analytical ability and problem-solving skills with ability to work across abstraction levels
- Self-motivated with excellent organization, time management, and communication skills
- Experience with design and electromagnetic simulation tools (Mentor, Cadence tools, SPICE, Ansys)
- Experience with Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP, Concept HDL, Sigrity) and/or Mentor Xpedition platform tools (PCB Layout/XPD, Designer, Hyperlynx)
- Knowledge of assembly processes, test and characterization techniques (preferred)
- Strong communication and collaboration
- Independent work ethic
- Structured problem solving
- Mentor and Cadence toolchains
- SPICE and Ansys simulations
- Cadence Allegro (APD/SiP, PCB Editor)
